Position: Consultant – Chip Design Centre
Institution: National University of Sciences & Technology (NUST)
Application Deadline: June 29, 2025
Location: Islamabad, Pakistan
Job Type: Full-Time, Consultant Role
Introduction
The National University of Sciences & Technology (NUST) invites accomplished professionals to apply for the role of Consultant at the Chip Design Centre. This opportunity is ideal for visionary experts who possess deep academic and industry experience in semiconductor and chip design. The role offers the chance to drive cutting-edge innovation and establish NUST as a global leader in semiconductor research.
Required Qualification & Experience
Educational Requirements:
- PhD in Electrical Engineering, Computer Engineering, or any other relevant discipline from an HEC-recognized institution.
Experience:
- Minimum of 10 years of experience in chip design.
- Demonstrated leadership in advanced research or industrial semiconductor projects.
Publication Criteria:
- Candidates must fulfill HEC publication requirements for faculty-level appointments.
Key Responsibilities
- Collaborate with academic institutions and industry partners to innovate in chip design and verification.
- Spearhead major research projects, setting strategic direction in semiconductor development.
- Supervise and mentor a team of engineers and researchers in chip development.
- Drive partnerships with global tech firms and R&D organizations.
- Lead multiple tape-out projects and contribute to global semiconductor technology.
- Contribute to strategic knowledge building and IP development.
Required Skills and Abilities
- Mastery of chip design workflows, including RTL design, tape-outs, and verification.
- Strong analytical, problem-solving, and decision-making abilities.
- Leadership experience in academic and/or industrial chip design environments.
- Proficiency in EDA tools and VLSI architecture.
- Excellent skills in communication, collaboration, reporting, and mentoring.
- Ability to build and lead high-performance semiconductor teams.
Terms and Conditions
- All academic and professional documents must be scanned and uploaded.
- Final academic credentials must be verified by HEC.
Ineligibility Criteria:
- Third division in academic record.
- Incomplete degrees or ongoing academic programs.
- NUST employees with less than one year of service or without NOC.
- Medically unfit candidates.
- Government or military personnel without departmental NOC.
- Late or incomplete applications will be rejected.
- Only shortlisted candidates will be called for further steps.
- No TA/DA will be provided for interviews.
- NUST reserves the right to modify or cancel this hiring process at any time.
How to Apply
Submit your application through the official NUST Careers Portal by June 29, 2025. Ensure all necessary documents are uploaded and verified. Only complete submissions will be considered.
Frequently Asked Questions (FAQs)
💬 What is the application deadline?
The last date to apply is June 29, 2025.
💬 Is a PhD necessary for this position?
Yes, a PhD in Electrical or Computer Engineering or a related field is mandatory.
💬 What is the minimum experience requirement?
Applicants must have 10+ years of experience in chip design with a strong leadership background.
💬 Are publications required?
Yes, candidates must meet HEC’s publication criteria.
💬 Can applicants from the private sector apply?
Yes, candidates from academia and industry are both encouraged to apply.
💬 Is NOC required for government employees?
Yes, candidates from public sector organizations must provide a valid NOC.
💬 Will NUST provide TA/DA for interviews?
No, TA/DA will not be provided.
💬 Can NUST employees apply?
Yes, if they have completed at least one year and have the required NOC.
💬 What are the primary responsibilities?
Leading chip design innovation, mentoring researchers, and fostering global R&D partnerships.
💬 Is the position based in Islamabad?
Yes, this position is located at the NUST Chip Design Centre, Islamabad.
